Three-dimensional nonvolatile memory scaling
Lu, Chih-Yuan Macronix International Co., Ltd., Hsinchu, Taiwan, Republic of China.
- Operation of flash memory devices
- Scaling of 2D flash memory
- Conventional 2D NAND
- Three-dimensional NAND
- 3D NAND scaling
- Bit cost for 3D NAND
- 3D nonvolatile memory using two-terminal devices
- Links to Primary Literature
- Additional Readings
NAND flash memory, which dominates the nonvolatile memory market, has seen exponential growth in the past 15 years as the result of its very rapid scaling. NAND flash has been scaling at a pace of about 18 months per technology node. (A new technology node usually uses minimum features that are approximately 70% of the previous node, resulting in doubling the number of devices, or amount of memory, that can be packed into a specified area.) At such a pace, NAND flash has quickly surpassed all other integrated circuit technologies. In early 2014, NAND flash with a 16-nm feature size was in volume production, compared to DRAM (dynamic random access memory), with feature sizes ranging in the upper 20s of nanometers. Furthermore, NAND flash is capable of storing more than one bit of information per memory cell by adjusting the amount of charge stored to produce multiple logic levels in one memory cell (multilevel logic cell, or MLC) to double or triple its storage density.
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